## Optimal Wire and Transistor Sizing for Circuits with Non-Tree TopologyL. Vandenberghe, S. Boyd, and A. El Gamal
ICCAD talk: iccad_talk97.pdf Matlab code for the examples. To run these Matlab scripts, you need CVX.
Conventional methods for optimal sizing of wires and transistors use linear RC
circuit models and the Elmore delay as a measure of signal delay. If the RC
circuit has a tree topology the sizing problem reduces to a convex optimization
problem which can be solved using geometric programming. The tree topology
restriction precludes the use of these methods in several sizing problems of
significant importance to high-performance deep submicron design including, for
example, circuits with loops of resistors, |