Prerequisites
It is highly recommended to have taken EE121. You are expected to understand how finite state machines work. EE182 can be taken either before this course or at the same time, but the final project uses this material heavily.Lab access:
Please give your SUID number to the staff so your ID card can be activated.Textbook and Materials:
Lecture notes are handed out during class. There is a copy of Wakerly's text from EE121 in the lab for reference.Course Requirements:
You must complete a tutorial and four lab projects. A written report is required with every lab in addition to the demonstration of the project to the TA or instructor. There will be one exam during the quarter covering the lecture and the lab material. A Xilinx FPGA will be used for each project, and some labs may require the use of additional discrete parts. All work must be finished by the "Dead" day before finals. No Incompletes will be given.Grading:
Projects: 80%Midterm Exam: 10%
Final Project Difficulty: 10%
For the projects, 50% of the grade is for demonstrating a working project, and 50% for the project report. No non-working projects will be accepted. The demonstration and report are each worth 20 points
Late Penalty:
It is very important to stay on track with this course. There will be no free late days or extensions given. The late penalty, both for demos and writeups, is 2 points per calendar day late. Labs must be completed, even for 0 points, to finish the course.Labs will be handed back as soon as possible after the deadline. All handouts will be available in lab after being distributed in class. It should go without saying that if you lose points for something on one lab and then do it again on the next lab you can expect to lose more points the second time.