transactional memory

A Case of System-Level Hardware/Software Co-Design and Co-Verification of a Commodity Multi-Processor System with Custom Hardware
This paper presents an interesting system-level co-design and co-verification case study for a non-trivial design where multiple …
Sungpack Hong, Tayo Oguntebi, Jared Casper, Nathan Bronson, Christos Kozyrakis, Kunle Olukotun
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Hardware Acceleration of Transactional Memory on Commodity Systems
The adoption of transactional memory is hindered by the high overhead of software transactional memory and the intrusive design changes …
Jared Casper, Tayo Oguntebi, Sungpack Hong, Nathan G. Bronson, Christos Kozyrakis, Kunle Olukotun
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Implementing and Evaluating Nested Parallel Transactions in Software Transactional Memory
Transactional Memory (TM) is a promising technique that simplifies parallel programming for shared-memory applications. To date, most …
Woongki Baek, Nathan Bronson, Christos Kozyrakis, Kunle Olukotun
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Making Nested Parallel Transactions Practical Using Lightweight Hardware Support
Transactional Memory (TM) simplifies parallel programming by supporting parallel tasks that execute in an atomic and isolated way. To …
Woongki Baek, Nathan Bronson, Christos Kozyrakis, Kunle Olukotun
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Implementing and Evaluating a Model Checker for Transactional Memory Systems
Transactional Memory (TM) is a promising technique that addresses the difficulty of parallel programming. Since TM takes responsibility …
Woongki Baek, Nathan Bronson, Christos Kozyrakis, Kunle Olukotun
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A Memory System Design Framework: Creating Smart Memories
As CPU cores become building blocks, we see a great expansion in the types of on-chip memory systems proposed for CMPs. Unfortunately, …
Amin Firoozshahian, Alex Solomatnikov, Ofer Shacham, Zain Asgar, Stephen Richardson, Christos Kozyrakis, Mark Horowitz
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Fast Memory Snapshot for Concurrent Programmingwithout Synchronization
The industry-wide turn toward chip-multiprocessors (CMPs) provides an increasing amount of parallel resources for commodity systems. …
JaeWoong Chung, Woongki Baek, Christos Kozyrakis
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Feedback-Directed Barrier Optimization in a Strongly Isolated STM
Speed improvements in today’s processors have largely been delivered in the form of multiple cores, increasing the importance of …
Nathan G. Bronson, Christos Kozyrakis, Kunle Olukotun
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ASED: Availability, Security, and Debugging Support Usingtransactional Memory
We propose ASeD that uses the hardware resources of transactional memory systems for non transactional memory purpose. We show that the …
JaeWoong Chung, Woongki Baek, Nathan Grasso Bronson, Jiwon Seo, Christos Kozyrakis, Kunle Olukotun
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Improving Software Concurrency with Hardware-Assisted Memory Snapshot
We propose a hardware-assisted memory snapshot to improve software concurrency. It is built on top of the hardware resources for …
JaeWoong Chung, Jiwon Seo, Woongki Baek, Chi CaoMinh, Austen McDonald, Christos Kozyrakis, Kunle Olukotun
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