Devrath Iyer

Email: deviyer AT stanford DOT edu

I am a PhD student in the Electrical Engineering department at Stanford University, working with Sara Achour on unconventional computing. I am generously supported by the NSF Graduate Research Fellowhip Program, the Apple Coterminal Scholarship in Integrated Systems, and the Stanford Graduate Fellowship as a TI Fellow. Previously, I received my BS and MS in EE from Stanford in 2024. You can find my resume here.

Publications

1. Iyer, D., & Achour, S. (2025, March). Efficient Optimization with Encoded Ising Models. In 2025 IEEE International Symposium on High Performance Computer Architecture (HPCA) (pp. 85-98). IEEE.

Misc.

• TGEN - a tool for generating names for new tools.