Yilong's Bio

I am a PhD candidate in the Electrical Engineering department of Stanford University under the supervision of Prof. Balaji Prabhakar. My main research interests are data center networking and distributed systems. My most recent projects focus on using statistical and machine learning tools to accurately synchronize clocks and monitor network dynamics in data centers. Some of my notable past work include a NetFPGA based Open Source Network Tester and Juggler, a reordering resilient network stack.

Before coming to Stanford I received my Bachelor's degree in the Electronic Engineering department of Tsinghua University in the year of 2012.