EE392C Spring 2002-03
Advanced Topics in Computer Architecture:Chip
Multiprocessors & Polymorphic Processors
Professor Christos Kozyrakis |
Conventional processors are based on the uniprocessor model and can only exploit instruction-level parallelism. However, diminishing returns from scaling superscalar and VLIW designs, increased design complexity, and the ability to pack hundreds of millions of transistors in one chip suggest that future architectures will be single-chip multiprocessors (CMPs). This class will cover a class of CMPs with coarse-grain reconfiguration abilities that allow them to adapt their on-chip computing and memory resources to the parallelism (data-, task-, or instruction-level) available in each application. Such processors are known as polymorphic processors. The goal is to provide performance and power efficiency similar to application-specific designs while maintaining the programmability and flexibility of general-purpose processors.
Throughout the quarter, we will discuss a series of topics related to the architecture, programming model, compilation, and system software for CMP/polymorphic processors. The goal is to identify key research issues and, through the projects, evaluate the potential of promising techniques. This course is recommended for Electrical Engineering and Computer Science graduate students interested in advanced research in the area of computer systems.
Christos Kozyrakis (christos@ee.stanford.edu)