Computer Systems Laboratory Colloquium

4:15PM, Wednesday, January 27, 1999
NEC Auditorium, Gates Computer Science Building B03

Trimaran: An infrastructure for EPIC compiler research

Vinod Kathail
HP Laboratories
About the talk:
The Trimaran compiler infra-structure provides a vehicle for state of the art research in compilation techniques for Explicitly Parallel Instruction Computing (EPIC) architectures. These architectures incorporate many new features (such as predication and speculation) and provide compile-time control over parallelism and machine resources. As a result, generating correct and high performance code for these architectures presents new challenges not encountered in compiling code for RISC processors.

Elcor, which constitutes most of the machine-dependent optimization part of Trimaran, was developed to experiment with individual compilation techniques as well as the compiler architecture into which they are integrated. Its key attributes (and the key factors that influenced its design) include support for region-based and profile-based compilation, full support for analysis and optimization of predicated code, and an emphasis on reducing the schedule length as opposed to the number of operations executed.

In this talk, I will give a brief overview of Trimaran, and then, I will discuss why we felt the need to develop Elcor, the key factors that influenced its design, and our motivations for making the infra-structure widely available for research.

About the speaker:

Vinod Kathail is a Project Scientist in the Compiler and Architecture Research group at HP Laboratories. He was a key contributor in the development of the Explicitly Parallel Instruction Computing (EPIC) that is the basis for IA64 and is the primary author of the HPL-PD architecture report. He leads HP Labs part of the Trimaran initiative and is the chief architect of the Elcor compiler, which constitutes most of the machine-dependent part of Trimaran. Vinod received his B.Tech degree from MACT, Bhopal, his M.Tech from IIT, Kanpur, and his Sc.D. in computer science from MIT, Cambridge. His research interests include EPIC architectures and compiler technology, automatic synthesis of application-specific processors for embedded computing, and programming languages and their implementations.

Contact information:

Vinod Kathail
HP Labs, MS 3L-5
1501 Page Mill Road
Palo Alto, CA 94304
(650)857-8077
(650)859-80
kathail@hpl.hp.com