EE183 is over. It will be replaced by EE109 in Spring 2004.
Welcome to EE183, Spring 2003!
EE183 meets in SEQ 101 on Mondays and Wednesdays from 8:00-8:50am.
Note: We will have class on Friday April 4th.
Introduction to EE183
EE183 is an essential class for anyone who want to go on to design digital circuitry. It is a largely hands-on lab class with emphasis on independent work, where students design digital circuits and then implement their designs. Various tools will be used to help the processs such as Xilinx Foundation, Synopsys FPGA Express and Xilinx Spartan II Field Programmable Gate Arrays (FPGA's). No previous experience with these tools is necessary, although a general familiarity with hardware design is expected.The labs will involve using a library of discrete parts, such as simple logic gates, muxes, and ALU's to build more complex systems. Students will learn how to realize large digital projects, bringing their designs from a technical specification to gate level circuitry using modern CAD tools and then programming their design into an FPGA. The choice of projects includes: various sequential machines, D/A converters, CRT displays, integrators, arithmetic processors, stored-program processors, and game-playing machines. In the final lab, students implement a simple pipelined processor and add to it several instructions of their own choosing.
Announcements
- EE183 is over. It will be replaced by EE109 in Spring 2004.
- For simulating coregen elements in ModelSim, please click here.
- If you want to convert an image file to BRAM format, please see the memory utilities available from previous quarters.
- For installing ModelSim on your home machines, please see the ModelSim Installation Instructions from EE108.
- Class mailing list: ee183@lists. Please subscribe to it ASAP.
- Please read the Tao of EE183 for hints on getting started, debugging, verilog, and report requirements.
- Get started on the Tutorial as soon as possible.
- EE121: Introduction to Logic Design is a prerequisite for EE183. Copies of the handouts from EE121 Winter 2002 are here
- Here's how to do VGA from the XSA-100 boards
- Here is the archived project for the VGA demo discussed in class. Use the bit file to test VGA monitors if you take a board home--not all work.
- Some info on how to initialize the BRAMS in the Spartans II devices.
- Paul's control.v tutorial on implementing state machines in verilog.
- Perl and Matlab implementations of mandelbrot and julia fractals. Note: the perl ouput looks funny since ascii character dimensions are not proportional.
- The Lab 3 starter files can be found here. Remember that there are at least two typeos in them so you should be sure to understand what is going on so you can find them.
- A historical comparison of performance for labs 1 and 2 can be found here. We expect you to do better. ;)
