SUBHASISH MITRA
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William E. Ayer Professor, Department of Electrical Engineering and Department of Computer Science Associate Chair (Faculty Affairs), Department of Computer Science Stanford University
Address: Gates Building, Room 411 353 Jane Stanford Way, Stanford, CA 94305
Email: subh at stanford dot edu Phone: 650-724-1915
Admin: Maria Hu Gates Building, Room 427 Email: mariasal at stanford dot edu Phone: 650-723-1458
Research topics: Robust Computing, NanoSystems, Electronic Design Automation, Neurosciences
Research group: https://rsg.stanford.edu
Publications Honors Professional Activities
Biography:
In the field of Robust Computing, he has created many key approaches for circuit failure prediction, on-line diagnostics, QED system validation, soft error resilience, and X-Compact test compression. Their adoption by industry is growing rapidly, in markets ranging from cloud computing to automotive systems. His X-Compact approach has proven essential for cost-effective manufacturing and high-quality testing of almost all 21st century systems, enabling billions of dollars in cost savings.
With his students and collaborators, he demonstrated the first carbon nanotube computer. They also demonstrated the first 3D NanoSystem with computation immersed in data storage. These received wide recognition: cover of NATURE, Research Highlight to the US Congress by the NSF, and highlight as "important scientific breakthrough" by global news organizations.
Prof. Mitra's honors include the Harry H. Goode Memorial Award (by the IEEE Computer Society for outstanding contributions in the information processing field), Newton Technical Impact Award in EDA (test-of-time honor by ACM SIGDA and IEEE CEDA), the University Researcher Award (by the Semiconductor Industry Association and Semiconductor Research Corporation to recognize lifetime research contributions), the Intel Achievement Award (Intel’s highest honor), and the US Presidential Early Career Award. He and his students have published over 10 award-winning papers across 5 topic areas (technology, circuits, EDA, test, verification) at major venues including the Design Automation Conference, International Solid-State Circuits Conference, International Test Conference, Symposium on VLSI Technology, Symposium on VLSI Circuits, and Formal Methods in Computer-Aided Design. Stanford undergraduates have honored him several times "for being important to them." He is an ACM Fellow, an IEEE Fellow, and a Distinguished Alumnus of the Indian Institute of Technology, Kharagpur.
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